Cargando…
Design and Verification of Microprocessor Systems for High-Assurance Applications
Design and Verification of Microprocessor Systems for High-Assurance Applications Edited by: David S. Hardin This book examines several leading-edge design and verification technologies that have been successfully applied to microprocessor systems for high-assurance applications at various levels -...
| Clasificación: | Libro Electrónico |
|---|---|
| Autor Corporativo: | |
| Otros Autores: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
New York, NY :
Springer US : Imprint: Springer,
2010.
|
| Edición: | 1st ed. 2010. |
| Temas: | |
| Acceso en línea: | Texto Completo |
MARC
| LEADER | 00000nam a22000005i 4500 | ||
|---|---|---|---|
| 001 | 978-1-4419-1539-9 | ||
| 003 | DE-He213 | ||
| 005 | 20220117210605.0 | ||
| 007 | cr nn 008mamaa | ||
| 008 | 100302s2010 xxu| s |||| 0|eng d | ||
| 020 | |a 9781441915399 |9 978-1-4419-1539-9 | ||
| 024 | 7 | |a 10.1007/978-1-4419-1539-9 |2 doi | |
| 050 | 4 | |a TK7867-7867.5 | |
| 072 | 7 | |a TJFC |2 bicssc | |
| 072 | 7 | |a TEC008010 |2 bisacsh | |
| 072 | 7 | |a TJFC |2 thema | |
| 082 | 0 | 4 | |a 621.3815 |2 23 |
| 245 | 1 | 0 | |a Design and Verification of Microprocessor Systems for High-Assurance Applications |h [electronic resource] / |c edited by David S. Hardin. |
| 250 | |a 1st ed. 2010. | ||
| 264 | 1 | |a New York, NY : |b Springer US : |b Imprint: Springer, |c 2010. | |
| 300 | |a XIV, 436 p. |b online resource. | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 347 | |a text file |b PDF |2 rda | ||
| 505 | 0 | |a ACL2 and Its Applications to Digital System Verification -- A Mechanically Verified Commercial SRT Divider -- Use of Formal Verification at Centaur Technology -- Designing Tunable, Verifiable Cryptographic Hardware Using Cryptol -- Verifying Pipelines with BAT -- Formal Verification of Partition Management for the AAMP7G Microprocessor -- Compiling Higher Order Logic by Proof -- Specification and Verification of ARM Hardware and Software -- Information Security Modeling and Analysis -- Modeling and Security Analysis of a Commercial Real-Time Operating System Kernel -- Refinement in the Formal Verification of the seL4 Microkernel -- Specification and Checking of Software Contracts for Conditional Information Flow -- Model Checking Information Flow. | |
| 520 | |a Design and Verification of Microprocessor Systems for High-Assurance Applications Edited by: David S. Hardin This book examines several leading-edge design and verification technologies that have been successfully applied to microprocessor systems for high-assurance applications at various levels - from arithmetic circuits to microcode to instruction sets to operating systems to applications. We focus on recent hardware, software, and system designs that have actually been built and deployed, and feature systems that have been certified at high Evaluation Assurance Levels, namely the Rockwell Collins AAMP7G microprocessor (EAL7) and the Green Hills INTEGRITY-178B separation kernel (EAL6+). The contributing authors to this book have endeavored to bring forth truly new material on significant, modern design and verification efforts; many of the results described herein were obtained only within the past year. Offers practical case studies of the successful application of formal methods at several different levels of real-world microprocessor system design; Discusses high-robustness design techniques that support formal verification; Shows how "Design for Verification" can become "Design with Verification", using modern verification tool suites that can readily import engineering designs; Features chapters written by practitioners who have achieved the highest assurance Evaluation Assurance Level (EAL) certifications defined by the Common Criteria; Formally develops the "GWV" family of information flow theorems used in recent EAL6+ and EAL7 certifications; Explains how designs expressed in new model-based development languages can be analyzed and verified; Demonstrates ways in which various kinds of formal verification tools can be utilized in combination to achieve a final verification result. | ||
| 650 | 0 | |a Electronic circuits. | |
| 650 | 0 | |a Computer-aided engineering. | |
| 650 | 0 | |a Security systems. | |
| 650 | 1 | 4 | |a Electronic Circuits and Systems. |
| 650 | 2 | 4 | |a Computer-Aided Engineering (CAD, CAE) and Design. |
| 650 | 2 | 4 | |a Security Science and Technology. |
| 700 | 1 | |a Hardin, David S. |e editor. |4 edt |4 http://id.loc.gov/vocabulary/relators/edt | |
| 710 | 2 | |a SpringerLink (Online service) | |
| 773 | 0 | |t Springer Nature eBook | |
| 776 | 0 | 8 | |i Printed edition: |z 9781441915542 |
| 776 | 0 | 8 | |i Printed edition: |z 9781441915382 |
| 776 | 0 | 8 | |i Printed edition: |z 9781489984593 |
| 856 | 4 | 0 | |u https://doi.uam.elogim.com/10.1007/978-1-4419-1539-9 |z Texto Completo |
| 912 | |a ZDB-2-ENG | ||
| 912 | |a ZDB-2-SXE | ||
| 950 | |a Engineering (SpringerNature-11647) | ||
| 950 | |a Engineering (R0) (SpringerNature-43712) | ||