Minimizing and Exploiting Leakage in VLSI Design
Minimizing and Exploiting Leakage in VLSI Design Nikhil Jayakumar, Suganth Paul, Rajesh Garg, Kanupriya Gulati and Sunil P. Khatri Power consumption of VLSI (Very Large Scale Integrated) circuits has been growing at an alarmingly rapid rate. This increase in power consumption, coupled with the incre...
Clasificación: | Libro Electrónico |
---|---|
Autores principales: | Jayakumar, Nikhil (Autor), Paul, Suganth (Autor), Garg, Rajesh (Autor) |
Autor Corporativo: | SpringerLink (Online service) |
Formato: | Electrónico eBook |
Idioma: | Inglés |
Publicado: |
New York, NY :
Springer US : Imprint: Springer,
2010.
|
Edición: | 1st ed. 2010. |
Temas: | |
Acceso en línea: | Texto Completo |
Ejemplares similares
-
Analysis and Design of Resilient VLSI Circuits Mitigating Soft Errors and Process Variations /
por: Garg, Rajesh
Publicado: (2010) -
Principles of VLSI RTL Design A Practical Guide /
por: Churiwala, Sanjay, et al.
Publicado: (2011) -
On and Off-Chip Crosstalk Avoidance in VLSI Design
por: Duan, Chunjie, et al.
Publicado: (2010) -
VLSI Design for Video Coding H.264/AVC Encoding from Standard Specification to Chip /
por: Lin, Youn-Long Steve, et al.
Publicado: (2010) -
Leakage in Nanometer CMOS Technologies
Publicado: (2006)