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Fine- and Coarse-Grain Reconfigurable Computing
Fine- and Coarse-Grain Reconfigurable Computing gives the basic concepts and building blocks for the design of Fine- (or FPGA) and Coarse-Grain Reconfigurable Architectures. Recently-developed integrated architecture design and software-supported design flow of FPGA and coarse-grain reconfigurable a...
| Clasificación: | Libro Electrónico |
|---|---|
| Autor Corporativo: | |
| Otros Autores: | , |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
Dordrecht :
Springer Netherlands : Imprint: Springer,
2007.
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| Edición: | 1st ed. 2007. |
| Temas: | |
| Acceso en línea: | Texto Completo |
MARC
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| 245 | 1 | 0 | |a Fine- and Coarse-Grain Reconfigurable Computing |h [electronic resource] / |c edited by Stamatis Vassiliadis, Dimitrios Soudris. |
| 250 | |a 1st ed. 2007. | ||
| 264 | 1 | |a Dordrecht : |b Springer Netherlands : |b Imprint: Springer, |c 2007. | |
| 300 | |a XVI, 381 p. |b online resource. | ||
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| 505 | 0 | |a I -- A Survey of Existing Fine-Grain Reconfigurable Architectures and CAD tools -- A Survey of Coarse-Grain Reconfigurable Architectures and Cad Tools -- Case Studies -- Amdrel -- A Coarse-Grain Dynamically Reconfigurable System and Compilation Framework -- Polymorphic Instruction Set Computers -- ADRES & DRESC: Architecture and Compiler for Coarse-Grain Reconfigurable Processors -- A Taxonomy of Field-Programmable Custom Computing Machines. | |
| 520 | |a Fine- and Coarse-Grain Reconfigurable Computing gives the basic concepts and building blocks for the design of Fine- (or FPGA) and Coarse-Grain Reconfigurable Architectures. Recently-developed integrated architecture design and software-supported design flow of FPGA and coarse-grain reconfigurable architecture are also described. Part I consists of two extensive surveys of FPGA and Coarse-Grain Reconfigurable Architectures: The FPGA technology is defined, which includes architecture, logic block structure, interconnect, and configuration methods and existing fine-grain reconfigurable architectures emerged from both academia and industry. Additionally, the implementation techniques and CAD tools developed to facilitate the implementation of a system in reconfigurable hardware by the industry and academia are provided. In addition the features, the advantages and limitations of the coarse-grain reconfigurable systems, the specific issues that should be addressed during the design phase, as well as representative existing coarse-grain reconfigurable systems are explained. In Part II, case studies, innovative research results about reconfigurable architectures and design frameworks from three projects AMDREL, MOLEN and ADRES&DRESC, and, a new classification according to microcoded architectural criteria are described. Fine- and Coarse-Grain Reconfigurable Computing is an essential reference for researchers and professionals and can be used as a textbook by undergraduate, graduate students and professors. Foreword by Yale Patt, Jim Smith and Mateo Valero. | ||
| 650 | 0 | |a Electronic circuits. | |
| 650 | 0 | |a Software engineering. | |
| 650 | 0 | |a Electronics. | |
| 650 | 0 | |a Computer engineering. | |
| 650 | 0 | |a Computer networks . | |
| 650 | 0 | |a Computers. | |
| 650 | 1 | 4 | |a Electronic Circuits and Systems. |
| 650 | 2 | 4 | |a Software Engineering. |
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| 700 | 1 | |a Soudris, Dimitrios. |e editor. |4 edt |4 http://id.loc.gov/vocabulary/relators/edt | |
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