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Systematic Methodology for Real-Time Cost-Effective Mapping of Dynamic Concurrent Task-Based Systems on Heterogenous Platforms

Systematic Methodology for Real-Time Cost-Effective Mapping of Dynamic Concurrent Task-Based Systems on Heterogeneous Platforms gives an overview of the state-of-the-art in system-level design trade-off explorations for concurrent tasks running on embedded heterogeneous multiple processors. The targ...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Autores principales: Ma, Zhe (Autor), Marchal, Pol (Autor), Scarpazza, Daniele Paolo (Autor), Yang, Peng (Autor), Wong, Chun (Autor), Gómez, José Ignacio (Autor), Himpe, Stefaan (Autor), Ykman-Couvreur, Chantal (Autor), Catthoor, Francky (Autor)
Autor Corporativo: SpringerLink (Online service)
Formato: Electrónico eBook
Idioma:Inglés
Publicado: Dordrecht : Springer Netherlands : Imprint: Springer, 2007.
Edición:1st ed. 2007.
Temas:
Acceso en línea:Texto Completo

MARC

LEADER 00000nam a22000005i 4500
001 978-1-4020-6344-2
003 DE-He213
005 20220112182820.0
007 cr nn 008mamaa
008 100301s2007 ne | s |||| 0|eng d
020 |a 9781402063442  |9 978-1-4020-6344-2 
024 7 |a 10.1007/978-1-4020-6344-2  |2 doi 
050 4 |a TK7867-7867.5 
072 7 |a TJFC  |2 bicssc 
072 7 |a TEC008010  |2 bisacsh 
072 7 |a TJFC  |2 thema 
082 0 4 |a 621.3815  |2 23 
100 1 |a Ma, Zhe.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
245 1 0 |a Systematic Methodology for Real-Time Cost-Effective Mapping of Dynamic Concurrent Task-Based Systems on Heterogenous Platforms  |h [electronic resource] /  |c by Zhe Ma, Pol Marchal, Daniele Paolo Scarpazza, Peng Yang, Chun Wong, José Ignacio Gómez, Stefaan Himpe, Chantal Ykman-Couvreur, Francky Catthoor. 
250 |a 1st ed. 2007. 
264 1 |a Dordrecht :  |b Springer Netherlands :  |b Imprint: Springer,  |c 2007. 
300 |a XII, 264 p.  |b online resource. 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
347 |a text file  |b PDF  |2 rda 
505 0 |a Related Work -- System Model and Work Flow -- Basic Design-Time Scheduling -- Scalable Design-Time Scheduling -- Fast and Scalable Run-time Scheduling -- Handling of Multidimensional Pareto Curves -- Run-Time Software Multithreading -- Fast Source-level Performance Estimation -- Handling of Task-Level Data Communication and Storage -- Demonstration on Heterogeneous Multiprocessor SoCs -- Conclusions and future research work. 
520 |a Systematic Methodology for Real-Time Cost-Effective Mapping of Dynamic Concurrent Task-Based Systems on Heterogeneous Platforms gives an overview of the state-of-the-art in system-level design trade-off explorations for concurrent tasks running on embedded heterogeneous multiple processors. The targeted application domain covers complex embedded real-time multi-media and communication applications. Many of these applications are concurrent in the sense that multiple subsystems can be running simultaneously. Also, these applications are so dynamic at run-time that the designs based on the worst case execution times are inefficient in terms of resource allocation (e.g., energy budgets). A novel systematical approach is clearly necessary in the area of system-level design for the embedded systems where those concurrent and dynamic applications are mapped. This material is mainly based on research at IMEC and its international university network partners in this area in the period 1997-2006. In order to deal with the concurrent and dynamic behaviors in an energy-performance optimal way, we have adopted a hierarchical system model (i.e., the gray-box model) that can both exhibit the sufficient detail of the applications for design-time analysis and hide unnecessary detail for a low-overhead run-time management. We have also developed a well-balanced design-time/run-time combined task scheduling methodology to explore the trade-off space at design-time and efficiently handle the system adaptations at run-time. Moreover, we have identified the connection between task-level memory/communication management and task scheduling and illustrated how to perform the task-level memory/communication management in order to obtain the design constraints that enable the this connection. A fast approach is also shown to estimate at the system-level, the energy and performance characterization of applications executing on the target platform processors. 
650 0 |a Electronic circuits. 
650 0 |a Compilers (Computer programs). 
650 0 |a Computer-aided engineering. 
650 0 |a Microprocessors. 
650 0 |a Computer architecture. 
650 0 |a Computer vision. 
650 1 4 |a Electronic Circuits and Systems. 
650 2 4 |a Compilers and Interpreters. 
650 2 4 |a Computer-Aided Engineering (CAD, CAE) and Design. 
650 2 4 |a Processor Architectures. 
650 2 4 |a Computer Vision. 
700 1 |a Marchal, Pol.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
700 1 |a Scarpazza, Daniele Paolo.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
700 1 |a Yang, Peng.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
700 1 |a Wong, Chun.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
700 1 |a Gómez, José Ignacio.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
700 1 |a Himpe, Stefaan.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
700 1 |a Ykman-Couvreur, Chantal.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
700 1 |a Catthoor, Francky.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
710 2 |a SpringerLink (Online service) 
773 0 |t Springer Nature eBook 
776 0 8 |i Printed edition:  |z 9789048176106 
776 0 8 |i Printed edition:  |z 9789048114498 
776 0 8 |i Printed edition:  |z 9781402063282 
856 4 0 |u https://doi.uam.elogim.com/10.1007/978-1-4020-6344-2  |z Texto Completo 
912 |a ZDB-2-ENG 
912 |a ZDB-2-SXE 
950 |a Engineering (SpringerNature-11647) 
950 |a Engineering (R0) (SpringerNature-43712)