Full-Chip Nanometer Routing Techniques
As Moore's Law continues unencumbered into the nanometer era, chips are reaching 1000 M gates in size, process geometries have shrunk to 90 nm and below, and engineers have to face compounded design complexity with every new design. These nanometer-scale designs require a new generation of phys...
Clasificación: | Libro Electrónico |
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Autores principales: | Ho, Tsung-Yi (Autor), Chang, Yao-Wen (Autor), Chen, Sao-Jie (Autor) |
Autor Corporativo: | SpringerLink (Online service) |
Formato: | Electrónico eBook |
Idioma: | Inglés |
Publicado: |
Dordrecht :
Springer Netherlands : Imprint: Springer,
2007.
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Edición: | 1st ed. 2007. |
Colección: | Analog Circuits and Signal Processing,
|
Temas: | |
Acceso en línea: | Texto Completo |
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