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Embedded System Design: Topics, Techniques and Trends IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30 - June 1, 2007, Irvine (CA), USA /
Over recent years, embedded systems have gained an enormous amount of processing power and functionality. Many of the formerly external components can now be integrated into a single System-on-Chip. This tendency has resulted in a dramatic reduction in the size and cost of embedded systems. As a uni...
| Clasificación: | Libro Electrónico |
|---|---|
| Autor Corporativo: | |
| Otros Autores: | , , , , |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
New York, NY :
Springer US : Imprint: Springer,
2007.
|
| Edición: | 1st ed. 2007. |
| Colección: | IFIP Advances in Information and Communication Technology,
231 |
| Temas: | |
| Acceso en línea: | Texto Completo |
MARC
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| 245 | 1 | 0 | |a Embedded System Design: Topics, Techniques and Trends |h [electronic resource] : |b IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30 - June 1, 2007, Irvine (CA), USA / |c edited by Achim Rettberg, Mauro Zanella, Rainer Domer, Andreas Gerstlauer, Franz Rammig. |
| 250 | |a 1st ed. 2007. | ||
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| 490 | 1 | |a IFIP Advances in Information and Communication Technology, |x 1868-422X ; |v 231 | |
| 505 | 0 | |a Validation and Verification -- Requirements and Concepts for Transaction Level Assertion Refinement -- Using a Runtime Measurement Device with Measurement-Based WCET Analysis -- Implementing Real-Time Algorithms by using the AAA Prototyping Methodology -- Run-Time efficient Feasibility Analysis of Uni-Processor Systems with Static Priorities -- Approach for a Formal Verification of a Bit-serial Pipelined Architecture -- Automotive Applications -- Automotive System Optimization using Sensitivity Analysis -- Towards a Dynamically Reconfigurable Automotive Control System Architecture -- An OSEK/VDX-based Multi-JVM for Automotive Appliances -- Towards Dynamic Load Balancing for Distributed Embedded Automotive Systems -- Hardware Synthesis -- Automatic Data Path Generation from C code for Custom Processors -- Interconnect-aware Pipeline Synthesis for Array based Reconfigurable Architectures -- An Interactive Design Environment for C-based High-Level Synthesis -- Integrated Coupling and Clock Frequency Assignment of Accelerators During Hardware/Software Partitioning -- Embedded Vertex Shader in FPGA -- Specification and Partitioning -- A Hybrid Approach for System-Level Design Evaluation -- Automatic Parallelization of Sequential Specifications for Symmetric MPSoCs -- An Interactive Model Re-Coder for Efficient SoC Specification -- Constrained and Unconstrained Hardware-Software Partitioning using Particle Swarm Optimization Technique -- Design Methodologies -- Using Aspect-Oriented Concepts in the Requirements Analysis of Distributed Real-Time Embedded Systems -- Smart Speed TechnologyTM -- Embedded Software -- Power Optimization for Embedded System Idle Time in the Presence of Periodic Interrupt Services -- Reducing the Code Size of Retimed Software Loops under Timing and Resource Constraints -- Identification and Removal of Program Slice Criteria for Code Size Reduction in Embedded Systems -- Configurable Hybridkernel for Embedded Real-Time Systems -- Embedded Software Development in a System-Level Design Flow -- Network on Chip -- Data Reuse Driven Memory and Network-On-Chip Co-Synthesis -- Efficient and Extensible Transaction Level Modeling Based on an Object Oriented Model of Bus Transactions -- Hardware Implementation of the Time-Triggered Ethernet Controller -- Error Containment in the Time-Triggered System-On-a-Chip Architecture -- Medical Applications -- Generic Architecture Designed for Biomedical Embedded Systems -- A Small High Performance Microprocessor Core Sirius for Embedded Low Power Designs, Demonstrated in a Medical Mass Application of an Electronic Pill(EPill®) -- Distributed and Network Systems -- Utilizing Reconfigurable Hardware to Optimize Workflows in Networked Nodes -- Dynamic Software Update of Resource-Constrained Distributed Embedded Systems -- Configurable Medium Access Control for Wireless Sensor Networks -- Integrating Wireless Sensor Networks and the Grid through POP-C++ -- Panel -- Modeling of Software-Hardware Complexes -- Modeling of Software-Hardware Complexes -- Enhancing a Real-Time Distributed Computing Component Model through Cross-Fertilization -- Modeling of Software-Hardware Complexes -- Software-Hardware Complexes: Towards Flexible Borders -- Tutorials -- Embedded SW Design Space Exploration and Automation using UML-Based Tools -- Medical Embedded Systems. | |
| 520 | |a Over recent years, embedded systems have gained an enormous amount of processing power and functionality. Many of the formerly external components can now be integrated into a single System-on-Chip. This tendency has resulted in a dramatic reduction in the size and cost of embedded systems. As a unique technology, the design of embedded systems is an essential element of many innovations. Embedded System Design: Topics, Techniques and Trends presents the technical program of the International Embedded Systems Symposium (IESS) 2007 held in Irvine, California. IESS is a unique forum to present novel ideas, exchange timely research results, and discuss the state of the art and future trends in the field of embedded systems. Contributors and participants from both industry and academia take active part in this symposium. The IESS conference is organized by the Computer Systems Technology committee (TC10) of the International Federation for Information Processing (IFIP). Timley topics, techniques and trends in embedded system design are covered by the chapters in this book, including design methodology, specification and modeling, embedded software and hardware synthesis, networks-on-chip, distributed and networked systems, and system verification and validation. Particular emphaisis is paid to automotive and medical applications. A set of actual case studies and special aspects in embedded system design are included as well. | ||
| 650 | 0 | |a Computer science. | |
| 650 | 1 | 4 | |a Computer Science. |
| 700 | 1 | |a Rettberg, Achim. |e editor. |4 edt |4 http://id.loc.gov/vocabulary/relators/edt | |
| 700 | 1 | |a Zanella, Mauro. |e editor. |4 edt |4 http://id.loc.gov/vocabulary/relators/edt | |
| 700 | 1 | |a Domer, Rainer. |e editor. |4 edt |4 http://id.loc.gov/vocabulary/relators/edt | |
| 700 | 1 | |a Gerstlauer, Andreas. |e editor. |4 edt |4 http://id.loc.gov/vocabulary/relators/edt | |
| 700 | 1 | |a Rammig, Franz. |e editor. |4 edt |4 http://id.loc.gov/vocabulary/relators/edt | |
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