Verilog and SystemVerilog Gotchas 101 Common Coding Errors and How to Avoid Them /
In programming, "Gotcha" is a well known term. A gotcha is a language feature, which, if misused, causes unexpected - and, in hardware design, potentially disastrous - behavior. The purpose of this book is to enable engineers to write better Verilog/SystemVerilog design and verification co...
Clasificación: | Libro Electrónico |
---|---|
Autores principales: | Sutherland, Stuart (Autor), Mills, Don (Autor) |
Autor Corporativo: | SpringerLink (Online service) |
Formato: | Electrónico eBook |
Idioma: | Inglés |
Publicado: |
New York, NY :
Springer US : Imprint: Springer,
2007.
|
Edición: | 1st ed. 2007. |
Temas: | |
Acceso en línea: | Texto Completo |
Ejemplares similares
-
SystemVerilog for Design Second Edition A Guide to Using SystemVerilog for Hardware Design and Modeling /
por: Sutherland, Stuart, et al.
Publicado: (2006) -
SystemVerilog for Verification A Guide to Learning the Testbench Language Features /
por: Spear, Chris, et al.
Publicado: (2012) -
SystemVerilog for Verification A Guide to Learning the Testbench Language Features /
por: Spear, Chris
Publicado: (2006) -
SystemVerilog for Verification A Guide to Learning the Testbench Language Features /
por: Spear, Chris
Publicado: (2008) -
Writing Testbenches using SystemVerilog
por: Bergeron, Janick
Publicado: (2006)