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Verilog and SystemVerilog Gotchas 101 Common Coding Errors and How to Avoid Them /

In programming, "Gotcha" is a well known term. A gotcha is a language feature, which, if misused, causes unexpected - and, in hardware design, potentially disastrous - behavior. The purpose of this book is to enable engineers to write better Verilog/SystemVerilog design and verification co...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Autores principales: Sutherland, Stuart (Autor), Mills, Don (Autor)
Autor Corporativo: SpringerLink (Online service)
Formato: Electrónico eBook
Idioma:Inglés
Publicado: New York, NY : Springer US : Imprint: Springer, 2007.
Edición:1st ed. 2007.
Temas:
Acceso en línea:Texto Completo

MARC

LEADER 00000nam a22000005i 4500
001 978-0-387-71715-9
003 DE-He213
005 20220120211339.0
007 cr nn 008mamaa
008 100428s2007 xxu| s |||| 0|eng d
020 |a 9780387717159  |9 978-0-387-71715-9 
024 7 |a 10.1007/978-0-387-71715-9  |2 doi 
050 4 |a TK7867-7867.5 
072 7 |a TJFC  |2 bicssc 
072 7 |a TEC008010  |2 bisacsh 
072 7 |a TJFC  |2 thema 
082 0 4 |a 621.3815  |2 23 
100 1 |a Sutherland, Stuart.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
245 1 0 |a Verilog and SystemVerilog Gotchas  |h [electronic resource] :  |b 101 Common Coding Errors and How to Avoid Them /  |c by Stuart Sutherland, Don Mills. 
250 |a 1st ed. 2007. 
264 1 |a New York, NY :  |b Springer US :  |b Imprint: Springer,  |c 2007. 
300 |a XXII, 218 p.  |b online resource. 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
347 |a text file  |b PDF  |2 rda 
505 0 |a Introduction, What Is A Gotcha? -- Declaration and Literal Number Gotchas -- RTL Modeling Gotchas -- Operator Gotchas -- General Programming Gotchas -- Object Oriented and Multi-Threaded Programming Gotchas -- Randomization, Coverage and Assertion Gotchas -- Tool Compatibility Gotchas. 
520 |a In programming, "Gotcha" is a well known term. A gotcha is a language feature, which, if misused, causes unexpected - and, in hardware design, potentially disastrous - behavior. The purpose of this book is to enable engineers to write better Verilog/SystemVerilog design and verification code, and to deliver digital designs to market more quickly. This book shows over 100 common coding mistakes that can be made with the Verilog and SystemVerilog languages. Each example explains in detail the symptoms of the error, the languages rules that cover the error, and the correct coding style to avoid the error. The book helps digital design and verification engineers to recognize these common coding mistakes, and know how to avoid them. Many of these errors are very subtle, and can potentially cost hours or days of lost engineering time trying to find and debug the errors. This book is unique because while there are many books that teach the language, and a few that try to teach coding style, no other book addresses how to recognize and avoid coding errors with these languages. 
650 0 |a Electronic circuits. 
650 0 |a Computer-aided engineering. 
650 0 |a Computers. 
650 0 |a Electrical engineering. 
650 1 4 |a Electronic Circuits and Systems. 
650 2 4 |a Computer-Aided Engineering (CAD, CAE) and Design. 
650 2 4 |a Computer Hardware. 
650 2 4 |a Electrical and Electronic Engineering. 
700 1 |a Mills, Don.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
710 2 |a SpringerLink (Online service) 
773 0 |t Springer Nature eBook 
776 0 8 |i Printed edition:  |z 9781441944023 
776 0 8 |i Printed edition:  |z 9780387565682 
776 0 8 |i Printed edition:  |z 9780387717142 
856 4 0 |u https://doi.uam.elogim.com/10.1007/978-0-387-71715-9  |z Texto Completo 
912 |a ZDB-2-ENG 
912 |a ZDB-2-SXE 
950 |a Engineering (SpringerNature-11647) 
950 |a Engineering (R0) (SpringerNature-43712)