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Routing Congestion in VLSI Circuits Estimation and Optimization /
With the dramatic increases in on-chip packing densities, routing congestion has become a major problem in chip design. The problem is especially acute as interconnects are also the performance bottleneck in integrated circuits. The solution lies in judicious resource management. This involves intel...
| Clasificación: | Libro Electrónico |
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| Autores principales: | , , |
| Autor Corporativo: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
New York, NY :
Springer US : Imprint: Springer,
2007.
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| Edición: | 1st ed. 2007. |
| Colección: | Integrated Circuits and Systems,
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| Temas: | |
| Acceso en línea: | Texto Completo |