VLSI-SOC: From Systems to Chips IFIP TC 10/WG 10.5, Twelfth International Conference on Very Large Scale Ingegration of System on Chip (VLSI-SoC 2003), December 1-3, 2003, Darmstadt, Germany /

International Federation for Information Processing The IFIP series publishes state-of-the-art results in the sciences and technologies of information and communication. The scope of the series includes: foundations of computer science; software theory and practice; education; computer applications...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Autor Corporativo: SpringerLink (Online service)
Otros Autores: Glesner, Manfred (Editor ), Reis, Ricardo (Editor ), Indrusiak, Leandro (Editor ), Mooney, Vincent (Editor ), Eveking, Hans (Editor )
Formato: Electrónico eBook
Idioma:Inglés
Publicado: New York, NY : Springer US : Imprint: Springer, 2006.
Edición:1st ed. 2006.
Colección:IFIP Advances in Information and Communication Technology, 200
Temas:
Computer engineering.
Computer networks .
Electronic circuits.
Computer Engineering and Networks.
Electronic Circuits and Systems.
Acceso en línea:Texto Completo
Tabla de Contenidos:
  • Effect of Power Optimizations on Soft Error Rate
  • Dynamic Models for Substrate Coupling in Mixed-Mode Systems
  • Hinoc: A Hierarchical Generic Approach for on-Chip Communication, Testing and Debugging of SoCs
  • Automated Conversion of SystemC Fixed-Point Data Types
  • Exploration of Sequential Depth by Evolutionary Algorithms
  • Validation of Asynchronous Circuit Specifications Using IF/CADP
  • On-Chip Property Verification Using Assertion Processors
  • Run-Time FPGA Reconfiguration for Power-/Cost-Optimized Real-time Systems
  • A Switched Opamp Based 10 Bits Integrated ADC for Ultra Low Power Applications
  • Exploring the Capabilities of Reconfigurable Hardware for OFDM-Based Wlans
  • Software-Based Test for Nonprogrammable Cores in Bus-Based System-On-Chip Architectures
  • Optimizing SOC Test Resources Using Dual Sequences
  • A Novel full Automatic Layout Generation Strategy for Static CMOS Circuits
  • Low Power Java Processor for Embedded Applications
  • Impact of Gate Leakage on Efficiency of Circuit Block Switch-Off Schemes
  • Evaluation Methodology for Single Electron Encoded Threshold Logic Gates
  • Asynchronous Integration of Coarse-Grained Reconfigurable XPP-Arrays Into Pipelined Risc Processor Datapath
  • Gray Encoded Arithmetic Operators Applied to FFT and FIR Dedicated Datapaths
  • Stuck-At-Fault Testability of SPP Three-Level Logic Forms.

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