Constraint-Based Verification

Constraint-Based Verifcation covers the emerging field in functional verification of electronic designs thats is now commonly referred to by this name. Topics are developed in the context of a wide range of dynamic and static verification approaches including stimulation, emulation and formal method...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Autores principales: Yuan, Jun (Autor), Pixley, Carl (Autor), Aziz, Adnan (Autor)
Autor Corporativo: SpringerLink (Online service)
Formato: Electrónico eBook
Idioma:Inglés
Publicado: New York, NY : Springer US : Imprint: Springer, 2006.
Edición:1st ed. 2006.
Temas:
Electronic circuits.
Computer-aided engineering.
Electrical engineering.
Electronic Circuits and Systems.
Computer-Aided Engineering (CAD, CAE) and Design.
Electrical and Electronic Engineering.
Acceso en línea:Texto Completo
Tabla de Contenidos:
  • Constrained Random Simulation
  • High Level Verification Languages
  • Assertion Languages and Constraints
  • Preliminaries
  • Constrained Vector Generation
  • Constraint Simplification
  • More Optimizations
  • Constraint Synthesis
  • Constraint Diagnosis
  • Word-Level Constraint Solving.

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