Scalable Hardware Verification with Symbolic Simulation

Scalable Hardware Verification with Symbolic Simulation presents recent advancements in symbolic simulation-based solutions which radically improve scalability. It overviews current verification techniques, both based on logic simulation and formal verification methods, and unveils the inner working...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Autor principal: Bertacco, Valeria (Autor)
Autor Corporativo: SpringerLink (Online service)
Formato: Electrónico eBook
Idioma:Inglés
Publicado: New York, NY : Springer US : Imprint: Springer, 2006.
Edición:1st ed. 2006.
Temas:
Electronic circuits.
Computer-aided engineering.
Computers.
Electrical engineering.
Electronic Circuits and Systems.
Computer-Aided Engineering (CAD, CAE) and Design.
Computer Hardware.
Electrical and Electronic Engineering.
Acceso en línea:Texto Completo
Tabla de Contenidos:
  • Design and Verification of Digital Systems
  • Symbolic Simulation
  • Compacting Intermediate States
  • Approximate Simulation
  • Exact Parametrizations
  • Conclusion.

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