Scalable Hardware Verification with Symbolic Simulation
Scalable Hardware Verification with Symbolic Simulation presents recent advancements in symbolic simulation-based solutions which radically improve scalability. It overviews current verification techniques, both based on logic simulation and formal verification methods, and unveils the inner working...
Call Number: | Libro Electrónico |
---|---|
Main Author: | Bertacco, Valeria (Author) |
Corporate Author: | SpringerLink (Online service) |
Format: | Electronic eBook |
Language: | Inglés |
Published: |
New York, NY :
Springer US : Imprint: Springer,
2006.
|
Edition: | 1st ed. 2006. |
Subjects: | |
Online Access: | Texto Completo |
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