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Interconnect Noise Optimization in Nanometer Technologies
Interconnect has become the dominating factor in determining system performance in nanometer technologies. Dedicated to this subject, Interconnect Noise Optimization in Nanometer Technologies provides insight and intuition into layout analysis and optimization for interconnect in high speed, high co...
| Clasificación: | Libro Electrónico |
|---|---|
| Autores principales: | , |
| Autor Corporativo: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
New York, NY :
Springer US : Imprint: Springer,
2006.
|
| Edición: | 1st ed. 2006. |
| Temas: | |
| Acceso en línea: | Texto Completo |
MARC
| LEADER | 00000nam a22000005i 4500 | ||
|---|---|---|---|
| 001 | 978-0-387-29366-0 | ||
| 003 | DE-He213 | ||
| 005 | 20220120174514.0 | ||
| 007 | cr nn 008mamaa | ||
| 008 | 100301s2006 xxu| s |||| 0|eng d | ||
| 020 | |a 9780387293660 |9 978-0-387-29366-0 | ||
| 024 | 7 | |a 10.1007/0-387-29366-3 |2 doi | |
| 050 | 4 | |a TK7867-7867.5 | |
| 072 | 7 | |a TJFC |2 bicssc | |
| 072 | 7 | |a TEC008010 |2 bisacsh | |
| 072 | 7 | |a TJFC |2 thema | |
| 082 | 0 | 4 | |a 621.3815 |2 23 |
| 100 | 1 | |a Elgamel, Mohamed. |e author. |4 aut |4 http://id.loc.gov/vocabulary/relators/aut | |
| 245 | 1 | 0 | |a Interconnect Noise Optimization in Nanometer Technologies |h [electronic resource] / |c by Mohamed Elgamel, Magdy A. Bayoumi. |
| 250 | |a 1st ed. 2006. | ||
| 264 | 1 | |a New York, NY : |b Springer US : |b Imprint: Springer, |c 2006. | |
| 300 | |a XIX, 137 p. |b online resource. | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 347 | |a text file |b PDF |2 rda | ||
| 505 | 0 | |a Noise Analysis and Design in Deep Submicron -- Interconnect Noise Analysis and Optimization Techniques -- Crosstalk Noise Analysis in Ultra Deep Submicrometer Technologies -- Minimum Area Shield Insertion for Inductive Noise Reduction -- Spacing Algorithms for Crosstalk Noise Reduction -- Post Layout Interconnect Optimization for Crosscoupling Noise Reduction -- 3D Integration -- EDA Industry Tools: State of the ART. | |
| 520 | |a Interconnect has become the dominating factor in determining system performance in nanometer technologies. Dedicated to this subject, Interconnect Noise Optimization in Nanometer Technologies provides insight and intuition into layout analysis and optimization for interconnect in high speed, high complexity integrated circuits. The authors bring together a wealth of information presenting a range of CAD algorithms and techniques for synthesizing and optimizing interconnect. Practical aspects of the algorithms and the models are explained with sufficient details. The book investigates the most effective parameters in layout optimization. Different post-layout optimization techniques with complexity analysis and benchmarks tests are provided. The impact crosstalk noise and coupling on the wire delay is analyzed. Parameters that affect signal integrity are also considered. | ||
| 650 | 0 | |a Electronic circuits. | |
| 650 | 0 | |a Computers. | |
| 650 | 0 | |a Computer-aided engineering. | |
| 650 | 0 | |a Electrical engineering. | |
| 650 | 1 | 4 | |a Electronic Circuits and Systems. |
| 650 | 2 | 4 | |a Computer Hardware. |
| 650 | 2 | 4 | |a Computer-Aided Engineering (CAD, CAE) and Design. |
| 650 | 2 | 4 | |a Electrical and Electronic Engineering. |
| 700 | 1 | |a Bayoumi, Magdy A. |e author. |4 aut |4 http://id.loc.gov/vocabulary/relators/aut | |
| 710 | 2 | |a SpringerLink (Online service) | |
| 773 | 0 | |t Springer Nature eBook | |
| 776 | 0 | 8 | |i Printed edition: |z 9781441938442 |
| 776 | 0 | 8 | |i Printed edition: |z 9780387507163 |
| 776 | 0 | 8 | |i Printed edition: |z 9780387258706 |
| 856 | 4 | 0 | |u https://doi.uam.elogim.com/10.1007/0-387-29366-3 |z Texto Completo |
| 912 | |a ZDB-2-ENG | ||
| 912 | |a ZDB-2-SXE | ||
| 950 | |a Engineering (SpringerNature-11647) | ||
| 950 | |a Engineering (R0) (SpringerNature-43712) | ||