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CMOS PLL Synthesizers: Analysis and Design
CMOS PLL Synthesizers: Analysis and Design presents both fundamentals and state of the art PLL synthesizer design and analysis techniques. A complete overview of both system-level and circuit-level design and analysis are covered. A 16mW, 2.4GHz, sub-2V, S D fractional-N synthesizer prototype is imp...
| Clasificación: | Libro Electrónico |
|---|---|
| Autores principales: | , |
| Autor Corporativo: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
New York, NY :
Springer US : Imprint: Springer,
2005.
|
| Edición: | 1st ed. 2005. |
| Colección: | The Springer International Series in Engineering and Computer Science ;
783 |
| Temas: | |
| Acceso en línea: | Texto Completo |
MARC
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| 001 | 978-0-387-23669-8 | ||
| 003 | DE-He213 | ||
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| 007 | cr nn 008mamaa | ||
| 008 | 100301s2005 xxu| s |||| 0|eng d | ||
| 020 | |a 9780387236698 |9 978-0-387-23669-8 | ||
| 024 | 7 | |a 10.1007/b102174 |2 doi | |
| 050 | 4 | |a TK1-9971 | |
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| 100 | 1 | |a Shu, Keliu. |e author. |4 aut |4 http://id.loc.gov/vocabulary/relators/aut | |
| 245 | 1 | 0 | |a CMOS PLL Synthesizers: Analysis and Design |h [electronic resource] / |c by Keliu Shu, Edgar Sanchez-Sinencio. |
| 250 | |a 1st ed. 2005. | ||
| 264 | 1 | |a New York, NY : |b Springer US : |b Imprint: Springer, |c 2005. | |
| 300 | |a XVI, 216 p. 85 illus. |b online resource. | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 347 | |a text file |b PDF |2 rda | ||
| 490 | 1 | |a The Springer International Series in Engineering and Computer Science ; |v 783 | |
| 505 | 0 | |a Frequency Synthesizer for Wireless Applications -- PLL Frequency Synthesizer -- ?? Fractional-N PLL Synthesizer -- Enhanced Phase Switching Prescaler -- Loop Filter with Capacitance Multiplier -- Other Building Blocks of PLL -- Prototype Measurement Results -- Conclusions. | |
| 520 | |a CMOS PLL Synthesizers: Analysis and Design presents both fundamentals and state of the art PLL synthesizer design and analysis techniques. A complete overview of both system-level and circuit-level design and analysis are covered. A 16mW, 2.4GHz, sub-2V, S D fractional-N synthesizer prototype is implemented in 0.35mm CMOS. It features a high-speed and robust phase-switching prescaler, and a low-complexity and area-efficient loop capacitance mulitplier, which elegantly tackle speed and integration bottlenecks of PLL synthesizer. This book is useful as a PLL synthesizer manual for both academic researchers and industry design engineers. | ||
| 650 | 0 | |a Electrical engineering. | |
| 650 | 1 | 4 | |a Electrical and Electronic Engineering. |
| 700 | 1 | |a Sanchez-Sinencio, Edgar. |e author. |4 aut |4 http://id.loc.gov/vocabulary/relators/aut | |
| 710 | 2 | |a SpringerLink (Online service) | |
| 773 | 0 | |t Springer Nature eBook | |
| 776 | 0 | 8 | |i Printed edition: |z 9781441936509 |
| 776 | 0 | 8 | |i Printed edition: |z 9780387503622 |
| 776 | 0 | 8 | |i Printed edition: |z 9780387236681 |
| 830 | 0 | |a The Springer International Series in Engineering and Computer Science ; |v 783 | |
| 856 | 4 | 0 | |u https://doi.uam.elogim.com/10.1007/b102174 |z Texto Completo |
| 912 | |a ZDB-2-ENG | ||
| 912 | |a ZDB-2-SXE | ||
| 950 | |a Engineering (SpringerNature-11647) | ||
| 950 | |a Engineering (R0) (SpringerNature-43712) | ||